Embedded Systems

Konstantin Lübeck

Photo of Lübeck, Konstantin

Kon­stan­tin Lübeck
Uni­ver­sity of Tübin­gen
Dpt. of Com­puter Sci­ence
Em­bed­ded Sys­tems
Sand 13
72076 Tübin­gen
Ger­many

Tele­phone
+49 - (0) 70 71 - 29 - 78998
Tele­fax
+49 - (0) 70 71 - 29 - 50 62
E-Mail
Mail
Of­fice
Sand 13, B225
Of­fice hours
Open Door Pol­icy

Pro­jects on Github

Pro­file on Linkedin

Kon­stan­tin Lübeck is a grad­u­ate re­search as­sis­tant at the Chair for Em­bed­ded Sys­tems of the Uni­ver­sity of Tübin­gen. He re­ceived B.​Sc. and M.​Sc. de­grees in Com­puter Sci­ence from the Uni­ver­sity of Tübin­gen in 2015 and 2018 re­spec­tively with a major focus on com­puter en­gi­neer­ing and em­bed­ded sys­tems. In 2016, he stud­ied at the Up­p­sala Uni­ver­sity as an Eras­mus ex­change stu­dent. In 2017, he re­ceived a schol­ar­ship for mas­ter’s the­sis from the Stiftung In­dus­trieforschung. Since 2018, he is a lec­turer of com­puter ar­chi­tec­ture for the Bosch Learn­ing Com­pany ini­tia­tive at the tech­nol­ogy trans­fer cen­ter Tübin­gen. In ad­di­tion to his aca­d­e­mic work, he is a trained mecha­tron­ics tech­ni­cian (cer­ti­fied by the Ger­man cham­ber of in­dus­try and com­merce, IHK) and worked as a self-em­ployed soft­ware de­vel­oper.

Re­search In­ter­ests

Mod­el­ing, eval­u­a­tion, and pre­dic­tion of ma­chine learn­ing ac­cel­er­a­tor per­for­mance (end-to-end la­tency, through­put, roofline) using an­a­lyt­i­cal mod­els based on com­puter ar­chi­tec­ture de­scrip­tions (from reg­is­ter-trans­fer level to ab­stract block di­a­grams) and deep neural net­work pa­ra­me­ters (layer types and their hy­per­pa­ra­me­ters) for fast de­sign space ex­plo­rations used in neural net­work-hard­ware co-de­sign al­go­rithms.

Pub­li­ca­tions

Re­search pro­jects

Teach­ing

Ad­vanced Top­ics in Em­bed­ded Sys­tems Sum­mer 2019
Ef­fi­cient Ma­chine Learn­ing in Hard­ware Sum­mer 2021 Sum­mer 2022
En­twurf und Syn­these Einge­bet­teter Sys­teme Sum­mer 2019
Mod­erne Ar­chitek­turen Einge­bet­teter Sys­teme Win­ter 2018 Win­ter 2019 Win­ter 2020
Par­al­lele Rech­ner­ar­chitek­turen Sum­mer 2020 Sum­mer 2021 Win­ter 2022 Win­ter 2023
Pros­em­i­nar: Mod­erne Ar­chitek­turen Einge­bet­teter Sys­teme Win­ter 2021
Team­pro­jekt: Im­ple­men­tierung einer RISC-V Rech­ner­ar­chitek­tur Win­ter 2024
Team­pro­jekt: In­ter­ak­tiver Rech­ner­ar­chitek­tur­sim­u­la­tor Sum­mer 2023
Team­pro­jekt: Weit­er­en­twick­lung einer RISC-V Rech­ner­ar­chitek­tur Sum­mer 2025

The­sis Top­ics

News

Hard­ware Ac­cel­er­a­tor and Neural Net­work Co-Op­ti­miza­tion for Ul­tra-Low-Power Audio Pro­cess­ing De­vices

The paper “Hard­ware Ac­cel­er­a­tor and Neural Net­work Co-Op­ti­miza­tion for Ul­tra-Low-Power Audio Pro­cess­ing De­vices” has been ac­cepted at the 25th Eu­romi­cro Con­fer­ence on Dig­i­tal Sys­tem De­sign (DSD), pages 1-8, 2022. Key­words: Ma­chine Learn­ing, Neural Net­works, Au­toML, Neural Ar­chi­tec­ture Search

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Scale4Edge - Skalier­bare In­fra­struk­tur für Edge-Com­put­ing

Neues BMBF-Pro­jekt in der In­for­matik der Uni­ver­sität Tübin­gen zur En­twick­lung und Bere­it­stel­lung eines Ökosys­tems für eine skalier­bare und flex­i­bel er­weit­er­bare Edge-Com­put­ing-Plat­tform basierend auf der freien RISC-V-In­struk­tion­ssatzar­chitek­tur.

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GE­NIAL! - Gemein­same Elek­tronik-Roadmap für In­no­va­tio­nen der au­to­mo­bilen Wertschöpfungs­kette

Neues BMBF-Pro­jekt in der In­for­matik der Uni­ver­sität Tübin­gen zur Er­stel­lung einer au­to­mo­tive In­no­va­tions-Roadmap. BMBF und In­dus­trie fördern Vorhaben mit in­s­ge­samt 19,6 Mil­lio­nen Euro.

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