Dozent	Oliver Bringmann HeadOliver Bringmann
Vorlesung	Thu, 10 c.t. - 12 Uhr Room A301 (Sand 14)
Übungsleitung	Simon Garhofer ResearcherSimon Garhofer
Übungsgruppe	Thu, 8 c.t. - 10 Room A301 (Sand 14) Hauptklausur (written exam): 18.02.2027, 10:00 - 12:00, Sand F119
Umfang	2 SWS / 6 LP
Kursart	Vorlesung+Übung (6 LP)
Modulnummer	INF4317
Eintrag im Kurskatalog	Alma

Contents

This module deals with advanced aspects of computer architecture. Architectural concepts for improving performance by exploiting different levels of parallelism are discussed. Computer architecture concepts that can be used to exploit parallelism at different levels to improve performance are introduced. The module covers instruction-level parallelism such as superscalar execution and dynamic scheduling, speculative execution, advanced branch prediction, VLIW, and simultaneous multi-threading. It also covers modern parallel computing concepts, memory-coupled parallel computers, symmetric multiprocessors, distributed shared memory multiprocessors, multicore architectures, cache coherency protocols, performance evaluation of parallel computing systems, parallel programming models, network-on-chip architectures (topology, routing), heterogeneous system architectures and GPU7s.

Learning Target

Students will have extended competences in the area of modern computer architectures with a focus on parallel computer architectures, interconnection networks and heterogeneous systems. They know the advantages and disadvantages of different parallel computer architectures and the challenges of programming such systems. Students will be able to apply appropriate programming concepts for parallel architectures. In the exercises, the participants will gain a further understanding of the complexity of parallel processes and the difficulties that arise from them. By working independently in small groups, students will develop their teamwork and leadership skills.

Literature

• J. L. Hennessy, D. A. Patterson, C. Kozyrakis: Computer Architecture: A Quantitative Approach, Morgan Kaufmann Publishers Inc, Elsevier, 7th edition, 2025.
• S. Pasricha, N. Dutt: On-Chip Communication Architectures; Morgan Kaufmann Publishers Inc., 2008.
• Further literature for specific topics will be announced in the dedicated lectures.

Remark

The organization of the exercises (group assignment, announcement of times and rooms, etc.) will take place during the first lecture hour.

Requirement

Prerequisite for participation: INF3341 Grundlagen der Rechnerarchitektur or similar