Implementation of a Configuration Platform for the TÜRI5X Processor core
Master’s Thesis
Abstract
The TÜRI5X processor core is currently available in different microarchitecture variants. In this thesis the PULP-SDK shall be extended so that different microarchitecture variants can be selected and combined. In addition, it should be possible to automatically evaluate a configuration with regard to performance, area and energy efficiency.
Requirements
- Sucessfully passed ESES lecture or knowledge of hardware design using Verilog or VHDL